SAMSUNG HAS BEGUN mass-producing its 9th-generation triple-level cell (TLC) vertical NAND memory chips for high-performance/high-density solid-state drives. They are smaller and have an improved bit-density of 50 percent compared to the Samsung’s 8th-generation V-NAND. They will also have 290 active layers—a 20 percent improvement on previous generations.
This should enable Samsung to increase recording density of its 3D NAND devices. According to a report by Hankyung Media, Samsung plans to build on this by introducing a 10th Generation V-NAND chip in 2025 with 430 layers. It also says that Samsung has achieved this through a ‘string stacking production technique’: building a CMOS layer with logic, a 145-layer 3D NAND memory array on top, then successive identical layers on top of that.