JEDEC, the Joint Electron Device Engineering Council, has finalized the specifications for DDR5 memory. This 5th generation of DDR was originally scheduled for 2018, and Hynix built the first SIMMs that year, and we’ve have a number of “preliminary” DDR5 modules since. Now it’s all official. The maximum die density has jumped from 16Gbit to 64Gbit, and the maximum capacity to 128GB. Each DIMM has two 32-bit memory channels, instead of one 64-bit one, increasing the burst length. Memory voltage has dropped to 1.1V from 1.2V. A big change is the use of on-board voltage regulators; the module takes a straight 5V power supply from the mobo. Each module gets a VRM tuned to its requirements, rather than having a mobo set of VRMs that have to handle every eventuality.
DDR5 is expected to appear first as DDR5-4800, with DDR5-6400 following. The server rooms will be the first customers, using LRDIMMs of up to 2TB, with consumer rigs joining the party late next year at the earliest.
CL