DDR5 FINALLY FORMALIZED
SPEEDS START AT 4800MT/S, WITH DUAL CHANNELS AND VRMS ON EACH MODULE
JEDEC, the Joint Electron Device Engineering Council, has finalized the specifications for DDR5 memory. This 5th generation of DDR was originally scheduled for 2018, and Hynix built the first SIMMs that year, and we’ve have a number of “preliminary” DDR5 modules since. Now it’s all official. The maximum die density has jumped from 16Gbit to 64Gbit, and the maximum capacity to 128GB. Each DIMM has two 32-bit memory channels, instead of one 64-bit one, increasing the burst length. Memory voltage has dropped to 1.1V from 1.2V. A big change is the use of on-board voltage regulators; the module takes a straight 5V power supply from the mobo. Each module gets a VRM tuned to its requirements, rather than having a mobo set of VRMs that have to handle every eventuality.